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  1. /*----------------------------------------------------------------------------*/
  2. /*
  3. WiringPi KHADAS-EDGE Board Header file
  4. */
  5. /*----------------------------------------------------------------------------*/
  6. #ifndef __KHADAS_EDGE_H__
  7. #define __KHADAS_EDGE_H__
  8. /*----------------------------------------------------------------------------*/
  9. // Common mmap block size for KHADAS-EDGE GRF register
  10. #define EDGE_GRF_BLOCK_SIZE 0xF000
  11. // Common offset for GPIO registers from each GPIO bank's base address
  12. #define EDGE_GPIO_CON_OFFSET 0x04 // GPIO_SWPORTA_DDR
  13. #define EDGE_GPIO_SET_OFFSET 0x00 // GPIO_SWPORTA_DR
  14. #define EDGE_GPIO_GET_OFFSET 0x50 // GPIO_EXT_PORTA
  15. #define EDGE_FUNC_GPIO 0b00 // Bit for IOMUX GPIO mode
  16. // GPIO{0, 1}
  17. #define EDGE_PMUGRF_BASE 0xFF320000
  18. #define EDGE_PMUGRF_IOMUX_OFFSET 0x0000 // GRF_GPIO0A_IOMUX
  19. #define EDGE_PMUGRF_PUPD_OFFSET 0x0040 // PMUGRF_GPIO0A_P
  20. // GPIO{2, 3, 4}
  21. #define EDGE_GRF_BASE 0xFF770000
  22. #define EDGE_GRF_IOMUX_OFFSET 0xE000 // GRF_GPIO2A_IOMUX
  23. #define EDGE_GRF_PUPD_OFFSET 0xE040 // GRF_GPIO2A_P
  24. // Offset to control GPIO clock
  25. // Make 31:16 bit HIGH to enable the writing corresponding bit
  26. #define EDGE_PMUCRU_BASE 0xFF750000
  27. #define EDGE_PMUCRU_GPIO_CLK_OFFSET 0x0104 // PMUCRU_CLKGATE_COEDGE
  28. #define EDGE_CRU_BASE 0xFF760000
  29. #define EDGE_CRU_GPIO_CLK_OFFSET 0x037C // CRU_CLKGATE_CON31
  30. #define EDGE_CLK_ENABLE 0b0
  31. #define EDGE_CLK_DISABLE 0b1
  32. // Only for Linux kernel for now. Edit to 0 for Android
  33. #ifndef __ANDROID__
  34. #define EDGE_GPIO_PIN_BASE 1000
  35. #else
  36. #define EDGE_GPIO_PIN_BASE 0
  37. #endif
  38. // GPIO1_A. 0,1,2,3,4,7
  39. // GPIO1_B. 0,1,2,3,4,5
  40. // GPIO1_C. 2,4,5,6
  41. // GPIO1_D. 0
  42. #define EDGE_GPIO_1_BASE 0xFF730000
  43. // GPIO2_C. 0_B,1_B
  44. #define EDGE_GPIO_2_BASE 0xFF780000
  45. // GPIO4_C. 5,6
  46. // GPIO4_D. 0,4,5,6
  47. #define EDGE_GPIO_4_BASE 0xFF790000
  48. // Reserved
  49. // GPIO{0, 3}
  50. #define EDGE_GPIO_0_BASE 0xFF720000
  51. #define EDGE_GPIO_3_BASE 0xFF788000
  52. #ifdef __cplusplus
  53. extern "C" {
  54. #endif
  55. extern void init_khadas_edge (struct libkhadas *libwiring);
  56. #ifdef __cplusplus
  57. }
  58. #endif
  59. /*----------------------------------------------------------------------------*/
  60. #endif /* __KHADAS_EDGE_H__ */
  61. /*----------------------------------------------------------------------------*/